Mentor.Graphics.PADS.v2007.2 License KEYGEN

Mentor Graphics Corporation (Nasdaq: MENT), the market leader in printed circuit board design (PCB) solutions, announced the availability of the next generation of PADS(R) flow with the introduction of PADS2007. This newest release offers layout designers and engineers the ability to implement RF and microwave circuitry using highly automated functionality, perform design for fabrication (DFF) checking early in the design process, and optimize performance with advanced high-speed analysis/verification functionality, thus significantly improving their productivity and design quality.


"Mentor Graphics continues to invest in the future of PADS by strengthening the capabilities of designers to integrate RF circuitry design, high-speed net analysis and routing, and DFF into the PADS design flow," said Dan Boncella, director of marketing, System Design Division, Mentor Graphics. "This new release extends Mentor Graphics' technology leadership by moving these sophisticated design capabilities into the PADS desktop PCB solutions."

"Harris Corporation is excited about the new enhancements and features that are included in the new PADS 2007 release. The new library structure and direct DXF into the decal editor will save hours of effort for our EDA librarian staff by solving alpha-numeric translation issues and importing RF modeling directly into the decal editor," said John Adamski, EDA Specialist, Harris Corporation, RF Communications Division. "The new RF module has several time saving features. Trace manipulation for RF circuits, automated via shielding for sensitive traces, via plane flooding feature that is user selectable for interior plane fill or exterior (edge) fill. Manual via shielding for RF or EMI is now a thing of the past."

Additional enhancements in this release include:

High-speed routing improvements: controls for matched length nets and differential routing improvements.
Square and chamfered corners, DXF-in import, and via matrixing enhancements for RF design.
Blind/buried via drill table improvements: designs with partial vias (blind or buried) are automatically updated with the layer pairs and drill count of the partial vias in the design.
Alpha-numeric pin improvements: simplifies creation of large BGA-based parts.
ECO enhancements: includes comparison of design rules between the schematic and layout databases.
Design for fabrication (DFF) analysis: powerful fabrication checks, such as acid trap, starved thermals, solder mask slivers are checked in the CAD environment and database, allowing the designer to identify and correct manufacturing problems in PADS Layout, before Gerber generation.
Pin number visibility: the user has the ability to turn on/off the visibility of the component pin numbers, either numeric or alpha-numeric, improving designer productivity during routing.
SI analysis: integration of DxDesigner(TM) and the HyperLynx(R) LineSim(R) tool through a new interface allows fast transfer of a circuit for analysis and back annotation of termination resistor values.
Analog simulation: provides a board level simulation analysis and verification through a common schematic editor for both simulation and PCB design entry.
About PADS
PADS is the Windows(R)-based standard for PCB design solutions, combining value and broad technology. Its rich functionality and affordable pricing give customers a high return on their investment, enabling them to handle everything from basic designs to complex high-speed applications with speed, quality, and ease of use.